As an emerging nonvolatile memory technology, Resistive Random Access Memories (RRAMs) present various advantages in terms of cell area, device density, power consumption, programming/erasing speed, three-dimensional integration, multi-value implementation, and the like over FLASH memories, and thus attract attentions from the industry and research institutes. With the continuous development of the RRAM technology, the RRAMs have become a most promising candidate for leading products in the future memory market.
The RRAMs comprise a vertical arrangement of Metal/Insulator/Metal (MIM). As a result, the RRAMs can achieve high-density storage by means of a crossbar array configuration. In the crossbar array configuration, memory cells are disposed at respective intersections between a set of parallel lines and a further set of parallel lines, which are vertically spaced apart and extend in directions perpendicular to each other. Each of the memory cells can achieve independent selecting and thus reading/writing thereof.
FIG. 1 is a schematic plot showing a current versus voltage (I-V) characteristic presented by an existing RRAM cell in a low-resistance state during a read operation. As shown in FIG. 1, when the RRAM cell is in the low-resistance state, the device, being subjected to a DC sweep from −Vread to Vread, exhibits the symmetric I-V characteristic under positive and negative voltage polarities. In a crossbar array, some of the memory cells which are in the low-resistance state will create additional leakage paths due to their symmetric reading characteristic. These leakage paths will impact reading of the memory cells, resulting in severe reading crosstalk in the memory array. FIG. 2 is a schematic view illustrating the reading crosstalk in an existing RRAM crossbar array. As shown in FIG. 2, among four adjacent memory cells, one cell with a coordinate of (1,1) is in the high-resistance state, while the remaining three cells (1,2), (2,2), and (2,1) are in the low-resistance state. In a case where a read voltage is applied to the cell (1,1), it is expected that a current would flow along a path of (1,1)→(2,1), as indicated by white arrows in the drawing. Instead, actually a current can flow along a low-resistance path of (1,2)→(2,2)→(2,1), as indicated by black dotted arrows in the drawing. As a result, the cell (1,1) is misread as being in the low-resistance state (an ON state). In FIG. 2, a symbol “?” indicates that the true state of the cell (1,1) cannot be accurately acquired in this case.
For unipolar and bipolar RRAMs, currents flowing through a device in the low-resistance state under a positive read voltage and a negative read voltage should have different values, in order to suppress the crosstalk. This implies that the memory cell should exhibit a rectifying characteristic. The unipolar RRAMs have a programming voltage and an erasing voltage which are same in polarity, and thus can achieve suppression of the crosstalk simply with a normal rectifying diode. However, the bipolar RRAMs have a programming voltage and an erasing voltage which must be different in polarity, and thus need relatively large currents in both a positive direction and a negative direction under relatively large (programming or erasing) voltages. Normal unidirectional rectifying diodes cannot supply a sufficient current for the erasing operation at all.
Presently, most of the bipolar RRAMs adopt transistors as selector devices, and thus have their memory cells in a 1T1R configuration so as to suppress the reading crosstalk in the array. However, a memory cell in the 1T1R configuration has a cell area larger than that of a memory cell in a 1D1R or 1R configuration. As a result, it is disadvantageous in improving the storage density.